-
Notifications
You must be signed in to change notification settings - Fork 57
Pull requests: PennyLaneAI/catalyst
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
Higher order primitives can take in dynamically allocated registers
#2130
opened Oct 20, 2025 by
paul0403
Loading…
4 of 6 tasks
Update to Pylint 4.0.0
do-not-merge
wip
PRs that are a Work-In-Progress
#2121
opened Oct 14, 2025 by
paul0403
Loading…
Runtime router
external
PRs where the author is not a part of PennyLane Org (or part of external contributors team)
#2117
opened Oct 13, 2025 by
ritu-thombre99
Loading…
Add dynamic qreg alloc for cross-qreg gate decomposition
#2074
opened Oct 1, 2025 by
rniczh
Loading…
Issue #1714: Add variable names to the IR
external
PRs where the author is not a part of PennyLane Org (or part of external contributors team)
#2054
opened Sep 18, 2025 by
rturrado
Loading…
prototype MLIR decomposition for symbolic adjoint rotation
#2040
opened Sep 8, 2025 by
josephleekl
•
Draft
3 tasks
Add functionality to obtain some specs/info on quantum operations
wip
PRs that are a Work-In-Progress
[experiment] refactor to use PL as autograph SoT
wip
PRs that are a Work-In-Progress
#2016
opened Sep 2, 2025 by
andrijapau
Loading…
3 tasks
[Unified Compiler] Renaming
python_compiler into unified_compiler
#1997
opened Aug 21, 2025 by
PietropaoloFrisoni
Loading…
Previous Next
ProTip!
Mix and match filters to narrow down what you’re looking for.